3. 7 advantages of the NFM series
The NFM series combines the four effects shown on the left side of the figure below to achieve a large insertion loss.
The component also has three advantages for use in noise suppression, as shown on the right side of the figure below.
The following sections describe these features.
(1) Effect of 3-terminal structure + feed-through specification
If we were to make a 3-terminal capacitor with only one ground (3-terminal capacitors with such an electrode structure do not exist), it would look like the figure on the right below.
The 3-terminal capacitor converts half of the inductance of the noise bypass path in the direction of the noise path in series with this able electrode structure, it has the effect of halving the inductance generated by the capacitor itself and mounting land. (6 dB effect in terms of insertion loss)
In addition to this, the inductance generated in the capacitor itself is almost halved because the 3-terminal capacitor is designed to allow noise to penetrate through it. (approx. 6 dB effect)
These effects add up to a 12 dB improvement.
Normal capacitor
3-terminal capacitor
ESL is halved (= 6 dB) by the 3-terminal structure, and ESL is further halved (= 6 dB) by the effect of the feed-through specification, for a total effect of 12 dB.
<Mechanism of inductance reduction by through-hole specification>
The distance from the center of the MSL (microstrip line) to the via can be reduced to less than half, so the inductance is less than 1/2.
For multilayer capacitors
For NFM
Comparing the 0603-inch (1608M) size multilayer capacitor to the NFM, the distance from the center of the MSL to the via is less than half as shown in the figure above.
Furthermore, the width of the capacitor body relative to the bypass direction * is doubled for the NFM, 1.6 mm compared to 0.8 mm for the multilayer capacitor, inductance in the bypass direction is also slightly reduced.
Although the inductance of the "via" part remains the same, the above effect improves the overall inductance by less than half, i.e., by more than 6 dB.
It can be expected.
Actual measurement shows this difference in insertion loss characteristics between the multilayer capacitor and the NFM connected with a single via using a ground electrode on one side.
(2) Effect of two grounds on either side
ESL is halved (= 6 dB) by the parallel effect of the two ground locations, and further halved (= 6 dB) by the left-right interaction, for a total effect of 12 dB.
In case of one ground
When there are two grounds
Since the NFM has two ground electrodes on the left and right, there are two bypass paths to ground.
Therefore, in circuit terms, the total inductance is halved due to the effect of the two systems. (6 dB effect)
However, when actually measured, the insertion loss is much more greatly improved. (Actually, the effect is about 12 dB)
This is thought to be due to the mutual inductive effect (mutual inductance) of the currents flowing on the left and right sides, which makes each ESL smaller.
Actual measurements show that the insertion loss characteristics change as follows when the NFM ground is on one side or both sides.
<What is the mutual induction effect of currents flowing to the left and right?>
NFM has two ground electrodes on the left and right sides.
Let's consider a mechanism whereby ESL is reduced due to mutual induction effects when current flows from the center of the component to the left and right sides.
aa' cross section
Equivalent circuit when the capacitor is considered as a short
When the left and right sides are symmetrical, L1 = L2, and the current is equal, the composite inductance is as follows.
<How much does the inductance actually decrease?>
We modeled the capacitor section as a cylindrical conductor, as shown in the figure below, and calculated its inductance.
When cylindrical wires with a radius of 1 mm are butted together with a gap of zero and current flows in opposite directions, the calculated external inductance of the wires on one side is the above figure shows the result. In the region where the wiring length is shorter than the diameter, the mutual inductance increases and the total inductance (LNFM + Land) becomes they tend to be smaller.
<If we apply the effect of reduced inductance to insertion loss>
The 0.8 mm length assuming NFM18HC results in about 8 dB larger insertion loss. (50Ω conversion)
(When lines with a radius of 1 mm are butted together with a spacing of 0 mm)
The effect of inductance reduction shown on the previous page is expressed in terms of improved insertion loss, as shown in the figure above.
In cases where lines are extremely "thick and short," such as lines that are 1 mm or less in length, the inductance reduction effect caused by mutual induction of current flowing to the left and right becomes significant and cannot be ignored.
It is not surprising that an NFM of size 1608 would show an effect of about 8 dB, but the external shape of the actual component is not cylindrical, and the actual board does not have a via inductance, etc., other than this part, such as the presence of inductance, etc., the result of this measurement is about 6 dB (half of the 12 dB on page 11).
It is believed that the effect remained.
<The effect of current flow to the left and right is also slightly manifested in multilayer capacitors>
If only two capacitors are in parallel, the difference should be 6 dB*, but if they are mounted on both sides of the line (hereafter referred to as corresponding) as in this experiment, it has changed by 8 dB instead of 6 dB.
- *When two capacitors are placed in parallel (side by side), the mutual inductive effect actually works in reverse, so in such an implementation, the difference in insertion loss may be slightly less than 6 dB.
When 3-terminal capacitors are used non-through, the effect of current flow from inside the component can be achieved, which is even better than using two laminated capacitors opposite each other.
The effect will be significant.
However, compared to when using a 3-terminal capacitor in a through-hole configuration, the effect is smaller.
This is because in a through-hole configuration, all current passes through the interior of the 3-terminal capacitor.
The insertion loss is approximately 3 dB greater when a 3-terminal capacitor is used with a non-through capacitor than when two laminated capacitors are used opposite each other.
Insertion loss is approximately 10 dB greater when a 3-terminal capacitor is used through than when a 3-terminal capacitor is used non-through.
(3) Effect of placing a grounding via directly under the component
When via is provided on both sides of the component
When a via is installed directly under the component
If instead of providing a ground via on the left and right of the NFM, it is provided directly below, in addition to the mutual inductive effect of the currents on the left and right, the mutual inductive effect of the currents above and below as shown on the right occurs, and the ESL in this area is even smaller.
Furthermore, the inductance of the pattern from the component to the via can be eliminated.
In this way, the inductance of the area above the PCB is reduced, but on the other hand, the number of vias is halved, so the inductance of the vias is doubled.
Depending on the length of the via, the above effects may be offset.
<Measurement results>
We saw the difference in insertion loss between having a via on the left and right of the component and having a via directly below the component.
In this case, a larger insertion loss was obtained with the via directly under the component.
(4) Effect of using multiple via for ground
<Measurement results>
Furthermore, we looked at the difference in insertion loss between the recommended land and the case with vias on the left and right of the component and the case with vias directly under the component.
In this case, the largest insertion loss was obtained at the recommended land.
In the case of NFM18HC, a large insertion loss is obtained by setting the final number of vias to 3 (recommended land).
The NFM series achieves extremely large insertion loss compared to multilayer capacitors by accumulating various effects in this way.
(5) Excellent effectiveness in low-impedance circuits such as power supplies
<The power supply impedance is decreasing due to the lower voltage of MPUs>
This has increased the need for noise rejection effects in low-impedance circuits.
Example of power supply impedance calculation
(From impedance calculation during capacitance design of Bulk Capacitor)
Reference: Ron Schmitt "Kind Electromagnetics for LSI Engineers" p.283, supervised by Tadahiro Kuroda, Maruzen Corporation 2005
In LSI power circuits, the power supply impedance must be kept to a small value of 1Ω or less. In such low-impedance circuits, multilayer capacitors can
It may be difficult to achieve a sufficiently large noise reduction effect.
<Insertion loss when laminated capacitors are used in a low impedance circuit>
Based on the measured insertion loss characteristics of the multilayer capacitor shown earlier, a calculation to convert the input/output impedance is shown in the figure above.
When used with an impedance as low as 0.5Ω, the multilayer capacitor will show frequencies where it has little effect (around 100 to 300 MHz).
This makes it necessary to use several tens of capacitors in a row or to use capacitors with different capacitance (different resonant frequency) in a row.
<Calculation results when NFM is used in a low impedance circuit>
(6) Ensures that currents diffusing through the power supply plane are also narrowed down and eliminated
<Noise spreading over the power supply plane is a problem in multilayer boards>
When supplying power to LSI devices such as BGAs and PGAs using a power plane, noise generated at the power terminals will spread even when using a large number of decoupling capacitors.
This is because the impedance in the power plane is extremely low, resulting in limited noise reduction effectiveness of the capacitors.
Additionally, when capacitors are arranged as shown in the figure above, it is difficult to sufficiently reduce the pitch between capacitors, allowing noise to spread through the gaps between them.
On the other hand, NFM forces current to be confined within the component, enabling the removal of noise that would otherwise spread across the power plane.
When an NFM is used for the power supply plane as shown in the above figure, the current entering and leaving the power supply terminals always passes through the inside of the NFM, ensuring noise reduction.
In principle, a large number of capacitors on the underside of the LSI are no longer needed.
The NFM is shown on the back side of the LSI in this figure, but it can be installed on the front side as well. Mount the NFM on the ground plane side as much as possible.
Please use it.
<Confirmation by experiment>
A comparison of the noise rejection effects of a laminated capacitor and a 3-terminal capacitor was performed under conditions where noise was radiated mainly from the power cable.
Radiated noise was measured when an IC operating at 16 MHz was operated on a multilayer board (FR4/4-layer board).
<Noise measurement method>
Noise measurements are performed on the following two types of boards. The following three types of boards were evaluated.
- Conducted noise (CISPR25 voltage method) measurement
- Data showing an index of noise rejection effectiveness under normal mode noise only condition conducted through the power supply line.
- Input/output section of power line is different from 50Ω, GND is almost ideal condition
- Radiated noise (CISPR25 ALSE method) measurement
- Data showing noise rejection effect of noise radiated from power cables (mixed normal/common mode noise)
- Input/output section of power line is different from 50Ω, GND is the same as the real one
Evaluation Substrate Type
<Noise measurement method: Conducted noise>
Measurements are made in accordance with the CISPR25 voltage method*.
The evaluation board is GND-reinforced with a GND plane.
Only the power line is measured/GND is connected with a terminator.
- *Although the voltage method has an upper frequency limit of 108 MHz, this time, the measurement is extended to 1000 MHz.
EMI receiver (N9038, Keysight)
Measuring conditions
Measurement frequency: 30 MHz to 1000 MHz
RBW: 120 kHz, VBW: 300 kHz
ATT: 0 dB
Pre Amp: 30 dB (310N Sonoma)
Compared to a diffuse arrangement of multilayer capacitors on the power plane (four 0.22uF capacitors), the use of NFM provides more than 20 dB of noise rejection depending on the frequency range resulted in a larger.
(7) Stable noise rejection regardless of pattern design
The effect of noise reduction by capacitors varies greatly depending on the shape of the pattern to which they are connected.
As is well known, due to the inductance of the pattern connecting the noise path to the capacitor and from the capacitor to via
Insertion loss can vary widely. Therefore, the pattern to which the capacitors are connected must be designed very carefully.
<Rough estimate of inductance generated in the pattern>
Inductance per unit length of microstrip line
Variation of insertion loss as a function of the length of wiring connected to a 1uF laminated capacitor
(The length here is calculated using the wiring length connected to the capacitor and the inductance of w = 0.5 mm in the graph on the left.)
About 20 dB when 10 mm of wiring is connected
Insertion loss may be smaller
NFM does not have a significant performance change if a ground via can be provided directly under the component.
By using the recommended pattern in NFM, you can stably reduce the inductance for connecting to ground.
To reduce the inductance of the via, we recommend reducing the distance (board thickness) to the ground plane.
<Effect of NFM on insertion loss of ground via>
In the case of NFM18HC, a large insertion loss is obtained by setting the final number of vias to 3 (recommended land).
The NFM series achieves extremely large insertion loss compared to multilayer capacitors by accumulating various effects in this way.
If a via cannot be provided directly below the NFM, the insertion loss can be increased by increasing the number of vias on both sides.
In this case, we recommend that it be installed as close to the component as possible and that the number of vias be the same on both sides.