6-1. Introduction
In this chapter, we cover how to stabilize power supply voltage and suppress noise, with a focus on digital IC power lines.
When I first started studying circuits back in the 1980s, I remember reading that capacitors must be installed in an IC power supply. The frequencies of digital signals back then were around 5MHz, so a lead wire with a 0.1µF ceramic capacitor was installed near the IC, and a 10µF electrolytic capacitor was then installed in that area.
Although this was standard practice back then, it became important to consider where to install capacitors and how much capacitance to use once we began using high-speed signals of 100MHz or more. Recent high-speed digital ICs carry a lower signal voltage, and any fluctuation in power supply voltage (power integrity [PI]) will affect the signal waveform (signal integrity [SI]) and could cause malfunctions.
6-2. The importance of power line capacitors
6-2-1. Why capacitors are needed on power lines
Let us first consider why capacitors are needed on power lines, with a digital IC as our example.
We used a circuit simulator to simulate the voltage waveforms and current waveforms of a power supply and signals. The simulation model is shown in Figure 2-1, and the results of the waveform simulation are shown in Figure 2-2. For simplicity, only the driver portion of the digital IC was modeled. Two switches (SW1 and SW2) connected in series are alternately turned ON/OFF. When SW1 is ON and SW2 is OFF, current from the DC power supply flows to the load and the signal rises. When SW1 is OFF and SW2 is ON, load current is discharged to GND and the signal falls. This causes a rectangular wave to be output from the driver IC. Note that the current polarity is positive in the direction flowing from the DC power supply to GND.
Figure 2-1. Digital IC simulation model
Figure 2-2. Results of simulation of power supply and signal voltage waveforms and current waveforms
Next, we simulated waveforms with inductor L1 formed from a power line and IC package, as shown in Figure 2-3. The results of the simulation are shown in Figure 2-4.
Figure 2-3. Simulation model with inductor L1
Figure 2-4. Results of simulation of effect of inductor L1 on waveforms
The results of the simulations reveal the following:
- Although a charging current flows to the load on the power line, power supply voltage Vcc to the IC does not fluctuate if inductor L1 is not present (no ripple voltage is generated).
- If inductor L1 is present, a potential difference occurs at both ends of inductor L1 and a ripple voltage occurs in Vcc.
- When the inductance of inductor L1 increases, it becomes more difficult for current to flow, which increases the charging time. This also increases the rise time of the waveform of signal voltage Vout.
Installing a capacitor to the power supply and GND near the IC can suppress ripple voltage.
This is because the transient current required by the IC is supplied by this capacitor.
The simulation model with a capacitor added is shown in Figure 2-5, and the results of the simulation are shown in Figure 2-6.
Figure 2-5. Simulation model with capacitors added
Figure 2-6. Results of waveform simulation with capacitor added
We know that adding a capacitor reduces the ripple voltage of Vcc and reduces the rise time of signal voltage waveform Vout.
In a simulation model where this load is 10pF, the capacitance will be insufficient if the capacitor is 1000pF, which will increase the ripple voltage of Vcc and also cause Vout to fluctuate. If this is 1µF, ripple voltage is suppressed and the signal becomes a clean rectangular wave. Installing a capacitor of a sufficient capacitance near the IC can suppress ripple voltage. In other words, a capacitor is required in order for the power supply to supply a transient current, as shown in Figure 2-7 (a). This could also be considered to function as a low-pass filter to eliminate ripples, as shown in Figure 2-7 (b).
Figure 2-7. The roles of a capacitor in the IC power line
6-2-2. Capacitor characteristics
Noise is bypassed to GND due to the low impedance of the capacitor. The ideal impedance-frequency characteristics of a capacitor are shown in Figure 2-8. Impedance decreases as the frequency increases, or as capacitance increases. If we think of the capacitor as a filter, transient current (noise) would be bypassed to ground (GND). This is why a capacitor on the power line is called a bypass capacitor. These capacitors are also called decoupling capacitors, as they perform decoupling so that noise is not transmitted. The effect of noise bypassed to GND increases as capacitor impedance decreases. If we think of the capacitor as a battery, then it could supply electricity more rapidly at lower capacitor impedance. This is why impedance is used as an indicator of capacitor performance.
Figure 2-8. Ideal capacitor impedance characteristics
However, actual capacitors include equivalent series inductance (ESL) and equivalent series resistance (ESR). Figure 2-9 shows a capacitor equivalent circuit. Impedance caused by ESL increases as frequency increases, as shown in Figure 2-10. Therefore, impedance will increase as the frequency increases from a given frequency (the self resonance frequency [SRF]). The effect of noise bypassed to GND will decrease as impedance caused by ESL and ESR increases. A capacitor installation pattern with high inductance will further reduce the effect of noise bypass.
Figure 2-9. Actual capacitor equivalent circuit
Figure 2-10. Actual capacitor impedance
Although we can reduce impedance in the high-frequency range by reducing capacitance, impedance above the self resonance frequency is not reduced in a capacitor of similar structure, as shown in Figure 2-11. This is because the ESL value of the capacitor selected here is the same.
Figure 2-11. Differences in impedance due to capacitance
6-3. Reducing impedance in the high-frequency range
In this section, we cover how to reduce impedance in the high-frequency range by selectively adding capacitors.
6-3-1. Capacitor installation pattern
Another problem is impedance caused by the capacitor installation pattern. What we need to consider first is to revise the power pattern and minimize impedance between the IC power terminal, capacitor, and GND terminal. The results of the impedance simulation with pattern included are shown in Figure 3-1. Increasing inductance by increasing the length of the pattern reduces the self resonance frequency, which increases impedance in the high-frequency range. In other words, it is important to use a shorter but wider pattern for installing the capacitor in order to reduce impedance.
Figure 3-1. Effect of pattern length on impedance
(Pattern width: 3mm)
We can reduce impedance by using multiple capacitors. The results of the impedance simulation with multiple capacitors of the same capacitance are shown in Figure 3-2. Increasing the number of capacitors reduces impedance and increases capacitance. This is especially useful in situations where the types of capacitors that can be used are limited due to withstand voltage.
Figure 3-2. Results of impedance simulation using multiple capacitors
We can also reduce impedance by combining capacitors of different capacitance. However, using capacitors of significantly different capacitance can create frequencies of higher impedance due to antiresonance. This phenomenon becomes more pronounced when pattern inductance is higher.
The results of the impedance simulation using 1000pF and 1µF connected in parallel are shown in Figure 3-3.
Antiresonance increasing impedance occurs within the self resonance frequency of the capacitor. Impedance within this antiresonance frequency may increase depending on the capacitor.
Figure 3-3. Results of impedance simulation using capacitors of different capacitance
This antiresonance effect is less likely to occur if capacitors of the same capacitance are used. The results of this impedance simulation are shown in Figure 3-4. If we use the same patterns, the self resonance frequency stays the same and we can reduce overall impedance. Using different patterns will cause antiresonance, since the impedance of each pattern would be different. However, the impedance of this antiresonance frequency is low around the self resonance frequency, and would therefore have less of an effect on increasing impedance.
Figure 3-4. Results of impedance simulation using capacitors of the same capacitance
6-3-2. Low ESL capacitor
It is best to attach capacitors on the back surface of an IC. However, this is not always possible due to the thickness of the board (such as in smartphones), and capacitors would therefore need to be installed around the IC. In such cases, the inductance of the capacitor installation pattern becomes a problem. There are also situations where multiple capacitors cannot be attached due to space limitations.
We use capacitors of lower ESL in these cases, and doing so requires careful consideration of structures and electrode materials. In this section, we will briefly cover LW reversed capacitors and three-terminal capacitors with special structures. These structures are shown in Figure 3-5, and their impedance-frequency characteristics are shown in Figure 3-6.
- An LW reversed capacitor has a wider pattern for lower ESL.
- A three-terminal capacitor has more GND terminals for even lower ESL.
Figure 3-5. Low ESL capacitor
Figure 3-6. Impedance of low ESL capacitor (1µF)
6-4. Power line noise suppression measures
So far, we have covered how to maintain power integrity and signal integrity on the power line. Next, we will discuss the effect of the power line on noise, and how to handle this problem.
6-4-1. Power line noise
We used a 3D electromagnetic field simulator with a circuit simulator to visualize power line noise. We have also derived magnetic field distribution and radiated emission.
The simulation model is shown in Figure 4-1. The 3D electromagnetic field simulator and circuit simulator are linked together.
The model used in the 3D electromagnetic field simulator is shown in Figure 4-1 (a). The board has been modeled. It is a double-sided board whose back surface is entirely grounded. The power pattern between the DC power supply and driver IC is 200mm. The driver IC and receiver IC are connected with a signal pattern that is 5mm long. The ICs are connected through a signal pattern rather than directly to one another, in order to identify noise caused by signals. The capacitors rendered on the power pattern are dummies meant simply to show where they are installed. The model used in the circuit simulation is shown in Figure 4-1 (b).
(a) 3D electromagnetic field simulator model
(b) Circuit simulator model
Figure 4-1. Simulation model
During the simulation, we derived radiated emission, along with voltage/current distribution and magnetic field distribution on the power line. Here, we defined the radiated emission as the maximum field strength at a distance of 3 meters away, when the board is rotated horizontally and vertically, as shown in Figure 4-2.
Figure 4-2. Radiated emission derivation method
The magnetic field analysis surface was the power pattern side of GND pattern, as shown in Figure 4-3.
Figure 4-3. Magnetic field distribution analysis surface
The results of the voltage/current distribution simulation are shown in Figure 4-4.
Impedance has not been matched, so the voltage and current vary across the power pattern. There are capacitors at both ends of the power pattern and impedance is low, which reduces voltage and increases current. We have also derived impedance by dividing voltage by current. Impedance also varies across the power pattern.
Figure 4-4. Results of voltage/current/impedance distribution simulation
The results of the radiated emission simulation are shown in Figure 4-5.
The signal is a 40MHz rectangular wave, so a 40MHz harmonic is radiated. Radiated emission is at its highest at a frequency of 360MHz. To confirm why this 360MHz frequency is strong, we also simulated the magnetic field distribution. The results are shown in Figure 4-6.
Figure 4-5. Results of radiated emission simulation (initial)
Figure 4-6. Results of magnetic field distribution simulation with ferrite bead installed on signal line (360MHz)
We found that the magnetic field distribution is particularly strong around the signal pattern between the driver IC and receiver IC.
In such a situation, it is possible for common mode noise caused by the signal to propagate in addition to differential mode noise caused by ripples in the power pattern.
6-4-2. Suppression of common mode noise from the signal line
Noise caused by a signal can be suppressed by installing a resistor or ferrite bead to reduce current. We next installed a ferrite bead, as shown in Figure 4-7. The characteristics of the ferrite bead are shown in Figure 4-8.
Figure 4-7. Simulation model with ferrite bead installed on signal line
Figure 4-8. Impedance characteristics of installed ferrite bead
(BLM ferrite bead: 120Ω at 100MHz)
The magnetic field distribution when the ferrite bead is installed is shown in Figure 4-9.
We can see that the magnetic field around the signal pattern has been reduced.
Figure 4-9. Results of magnetic field distribution simulation with ferrite bead installed on signal line
Installing a ferrite bead causes the impedance of the load to change, and also has an effect on the current flowing through the power supply.
The results of the voltage waveform and current waveform simulations are shown in Figure 4-10. The signal current is limited by the ferrite bead, which also limits the power supply current. This results in a lower peak value and greater width for the current waveform.
In other words, installing a ferrite bead on the signal line reduces common mode noise caused by signals and differential mode noise caused by ripples.
(a) Voltage waveform, current waveform
(b) Voltage/current/impedance distribution
Figure 4-10. Results of voltage/current simulation with ferrite bead installed to signal line
Figure 4-11 shows the results of the radiated emission simulation.
Radiated emission is reduced throughout. However, even though this was reduced by 3dB for 360MHz, it is still high.
Figure 4-11. Results of radiated emission simulation with ferrite bead installed to signal line
6-4-3. Adding capacitors to the power line
We next considered how to handle radiated emission at 360MHz.
We conducted a simulation with capacitors added to suppress differential mode voltage and current. The model is shown in Figure 4-12, and the results of the simulation are shown in Figure 4-13.
Figure 4-12. Simulation model with capacitors added
(b) Voltage/current/impedance distribution
Figure 4-13. Results of simulation with capacitors added
We increased the number of 1µF capacitors, but the radiated emission and voltage/current distribution remained the same. Capacitors reduce impedance and bypass the current to GND. If impedance is already low, adding a capacitor will have little effect. In this model, capacitor impedance is 240Ω (at 360MHz), while impedance on the IC power supply side is low at 4Ω (at 360MHz). Therefore, adding a capacitor has not reduced impedance or suppressed voltage or current.
6-4-4. Adding ferrite beads to the power line
In the first course of [Section 2], "Proper Use of Noise Suppression Products for Digital Circuits," we discussed how filter effectiveness is affected when impedance is not matched and varies depending on the position and frequency of the transmission line.
If impedance is low, resistors or ferrite beads installed connected in series will have a greater effect. If impedance is high, a capacitor installed shunted will have a greater effect.
With this in mind, we next installed ferrite beads to the power line. The simulation model is shown in Figure 4-14, and the results of the simulation are shown in Figure 4-15.
Figure 4-14. Simulation model with ferrite beads added to power line
(b) Voltage/current/impedance distribution
(c) Magnetic field distribution
Figure 4-15. Results of simulation with ferrite beads installed on signal line
Radiated emission at 360MHz was reduced by 13dB. Adding capacitors had no effect on differential mode noise, but we were able to suppress this by adding ferrite beads. This is why it is common in power lines to install capacitors near the IC and then install ferrite beads when needed.
On the other hand, it is common in signal lines to install resistors or ferrite beads on IC output and then add capacitors as needed, as discussed in the first course of [Section 2], "Proper Use of Noise Suppression Products for Digital Circuits." In other words, the concept behind installing a filter for the IC power input area is the opposite of the concept for the signal output area.
Figure 4-16. Power line and signal line noise suppression measure concepts
6-4-5. Ferrite beads for power lines
Ferrite beads for power lines are designed with lower DC resistance than those for signal lines. This is to reduce power supply voltage dropping.
Table 4-1. Differences in DC resistance of ferrite beads for signal lines and power lines
(1.6 × 0.8mm, 120Ω at 100MHz)
6-5. Summary
In the first section, we explained how capacitors are required to ensure power integrity and maintain signal integrity by suppressing ripple noise in the power supply. It is important to reduce inductance between the capacitor and IC, and to ensure sufficient capacitance based on the load. We also increase the number of capacitors or select low ESL capacitors, when needed.
In the next section, we covered some noise suppression measures. If adding capacitors does not have a sufficient effect on differential mode noise, adding ferrite beads can have a significant effect.
(a) Reduce pattern length
Ensure sufficient capacitance based on load
(b) Increase number of capacitors
Use same capacitance
(c) Use low ESL capacitor
Figure 5. Noise suppression measures around IC power supplies